Simultaneous Multithreading and related topics

Simultaneous multithreading (SMT) is an interesting way of maximizing performance by enhancing processor utilization.  Between 1993 and 1997, with S. Hily, have investigated various issues involving the behavior of the memory hierarchy with SMT: branch prediction, memory hierarchy behavior, out-of-order and in-order executions,..  Later (2004) with R. Dolbeau ,we have been exploring an intermediate design point between SMT and CMP, the CASH architecture (for Cmp And Smt Hybrid) which principles
are very similar to what has appeared in some recent designs. More recently with H. Vandierendonk, we explored instruction fetch policies for SMT.

Related publications:

Comments are closed.