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Les algorithmes de non-regret sont souvent utilisés dans les jeux répétés où les joueurs ont peu d’information sur le jeu auquel ils jouent. Ces algorithmes garantissent que le regret de chaque joueur est sous-linéaire. La moyenne temporelle des stratégies choisies en suivant un algorithme de non-regret converge dans l’ensemble des équilibres corrélés. Cependant cela ne donne aucune information sur la convergence de la séquence de stratégies.
Nous nous sommes intéressés à la question « est-ce que la sequence de stratégie obtenue pas un algorithme de non regret converge vers un équilibre de Nash? ».
Dans cet exposé, je présenterai un algorithme de non regret appelé Hedge qui est une version d’algorithmes à poids exponentiels. En particulier, je discuterai la convergence des séquences de stratégies obtenues par Hedge en utilisant deux types d’informations accessibles aux joueurs.

Monitoring and assessing the energy efficiency of supercomputers and
data centers is crucial in order to limit and reduce their energy
consumption. Applications from the domain of High Performance Computing
(HPC), such as MPI applications, account for a significant fraction of
the overall energy consumed by HPC centers. Simulation is a popular
approach for studying the behavior of these applications in a variety of
scenarios, and it is therefore advantageous to be able to study their
energy consumption in a cost-efficient, controllable, and also
reproducible simulation environment. Alas, simulators supporting HPC
applications commonly lack the capability of predicting the energy
consumption, particularly when target platforms consist of multi-core
nodes. In this work, we aim to accurately predict the energy consumption
of MPI applications via simulation. Firstly, we introduce the models
required for meaningful simulations: The computation model, the
communication model, and the energy model of the target platform.
Secondly, we demonstrate that by carefully calibrating these models on a
single node, the predicted energy consumption of HPC applications at a
larger scale is very close (within a few percents) to real experiments.
We further show how to integrate such models into the SimGrid simulation
toolkit. In order to obtain good execution time predictions on
multi-core architectures, we also establish that it is vital to
correctly account for memory effects in simulation. The proposed
simulator is validated through an extensive set of experiments with
well-known HPC benchmarks. Lastly, we show the simulator can be used to
study applications at scale, which allows researchers to save both time
and resources compared to real experiments