Calendar

Events in November–December 2023

  • Workshop Markovian bandits and reinforcement learning

    Category: Seminars Workshop Markovian bandits and reinforcement learning

    N/A
    November 20, 2023 November 21, 2023

    POLARIS is organizing the workshop on Markovian bandits and reinforcement learning. See https://gast.gitlabpages.inria.fr/restlessbandit-workshop for the detailed program.

    Bâtiment IMAG (amphitheater)
    Saint-Martin-d'Hères, 38400
    France
  • Workshop Markovian bandits and reinforcement learning

    Category: Seminars Workshop Markovian bandits and reinforcement learning

    N/A
    November 20, 2023 November 21, 2023

    POLARIS is organizing the workshop on Markovian bandits and reinforcement learning. See https://gast.gitlabpages.inria.fr/restlessbandit-workshop for the detailed program.

    Bâtiment IMAG (amphitheater)
    Saint-Martin-d'Hères, 38400
    France
  • PhD defense Louis Sébastien Rebuffi: Algorithmes d’apprentissage par renforcement pour le contrôle de systèmes de files d’attente

    Category: Seminars PhD defense Louis Sébastien Rebuffi: Algorithmes d’apprentissage par renforcement pour le contrôle de systèmes de files d’attente


    December 11, 2023

    Bien que l’apprentissage par renforcement ait été récemment principalement étudié dans le cas générique des processus de décisions markoviens, le cas des systèmes de files d’attente se dinstigue particulièrement. Pour compenser la taille de l’espace
    d’état qui peut être extrêmement grande a priori, les algorithmes d’apprentissage doivent tenir compte de la structure des systèmes afin d’en extraire le plus d’information et de choisir le meilleur contrôle qui optimisent au mieux les performances
    du système sur le long terme. Dans cette thèse, nous présentons des algorithmes construits à partir d’algorithmes classiques, adaptés au contexte des système de file d’attente, et nous étudions les performances de ceux-ci pour montrer une dépendance faible à l’espace d’états comparativement aux résultats obtenus dans le cas général.
    Jury:
    • Matthieu JONCKHEERE (DR CNRS, LAAS, Rapporteur)
    • Ger KOOLE (professeur, Vrije Universiteil Amsterdam, Rapporteur)
    • Nadia BRAUNER (professeure Université Grenoble Alpes, présidente)
    • Bruno GAUJAL (DR INRIA, LIG, Directeur de thèse)
    • Alain JEAN-MARIE (DR INRIA, Sophia Antipolis, Examinateur)
    Thèse supervisée par Jonatha ANSELMI et Bruno GAUJAL.
    Bâtiment IMAG (amphitheater)
    Saint-Martin-d'Hères, 38400
    France
  • Séminaire Eyan Castiel

    Category: Seminars Séminaire Eyan Castiel


    December 20, 2023

    Title : Induced idleness leads to deterministic limits in heavy traffic; distributed algorithm and time scale separation

    Abstract: In this talk, we’ll analyze a queue-based random-access algorithm where activation and deactivation rates are adapted as functions of local queue lengths. We establish its heavy traffic behavior on a complete interference graph, which turns out to be nonstandard in two respects: (1) the scaling depends on some parameter of the algorithm and is not the N/N^2 scaling usually found in functional central limit theorems; (2) the heavy traffic limit is deterministic. This nonstandard behavior arises from the idleness induced by the distributed nature of the algorithm. We’ll see how time scale separation allows for emergent

    Batiment IMAG (Room 306)
  • Maxime Gonthier: Scheduling Under Memory Constraint in Task-based Runtime Systems

    Category: Seminars Maxime Gonthier: Scheduling Under Memory Constraint in Task-based Runtime Systems


    December 21, 2023

    Hardware accelerators, such as GPUs, now provide a large part of the computational power used for scientific simulations. GPUs come with their own limited memory and are connected to the main memory of the machine via a bus with limited bandwidth. Scientific simulations often operate on very large data, to the point of not fitting in the limited GPU memory. In this case, one has to turn to out-of-core computing: data are kept in the CPU memory, and moved back and forth to the GPU memory when needed for the computation. This out-of-core situation also happens when processing on multi-core CPUs with limited memory huge datasets stored on disk. In both cases, data movement quickly becomes a performance bottleneck.

    Task-based runtime schedulers have emerged as an efficient way to manage large applications. They are in charge of choosing which tasks to assign on which processing unit and in which order they should be processed. During this talk, we aim to present the problem of scheduling for a task-based runtime to improve data locality in an out-of-core setting, in order to reduce data movements.

    We designed strategies for both task scheduling and data eviction from limited memories. We implemented them in the StarPU runtime and compared them to existing scheduling techniques in runtime systems. Our strategies achieves significantly better performance when scheduling tasks on multiple GPUs with limited memory, as well as on multiple CPU cores with limited main memory.

    We also present work on batch scheduling of IO intensive workloads. Similarly, we used data locality techniques to reduce the average latency of a job.

    In a more general approach, we would like to discuss the implications of introducing locality-aware techniques into different domains and the importance of performance visualizations.

    Bâtiment IMAG (406)
    Saint-Martin-d'Hères, 38400
    France

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