Category: News
SCHEMATIC at CGO’24
Nassim Amalou defends his PhD
Sara Hoseininasab at ARC 2023
Nicolas Bellec defends his PhD
On May 25th 2023, Nicolas Bellec defended his PhD on “Security enhancement in embedded hard real-time systems“.
Camille Le Bon at SILM-2021
Camille presented her paper “Damas: Control-Data Isolation at Runtime through Dynamic Binary Modification” in Sep 2021 at SILM. Watch the video online!
Nassim Amalou at RTCSA-2021
Nassim presented his paper “WE-HML: Hybrid WCET Estimation using Machine Learning for Architectures with Caches” in Aug 2021 at RTCSA. Watch the video online!
André Seznec receives the B. Ramakrishna Rau Award
André Seznec received the award “for pioneering contributions to cache design and branch prediction” on Oct 21st, during the (virtual) MICRO conference. The IEEE CS B. Ramakrishna Rau award was established in memory of B. Ramakrishna Rau, and awarded in recognition of his distinguished career in promoting and expanding the use of innovative computer microarchitecture techniques, including his innovation in compiler technology, his leadership in academic and industrial computer architecture, and his extremely high personal and ethical standards.
PhD defense of Niloofar Charmchi
Niloofar Charmchi successfully defended her PhD on Friday, July 10, 2020 at 10am. Jury members Rapporteurs : Karine HEYDEMANN Maîtresse de conférence, Sorbonne Université David DEFOUR Maître de conférence, Université de Perpignan Via Domitia Examinateurs : Florent DE DINECHIN Professeur des universités, INSA Lyon Steven DERRIEN Professeur des universités, Université Rennes 1 Directeur de thèse : André Seznec Directeur de recherches, Inria Co-dir. de thèse : Caroline Collange Chargée de recherche, Inria Title : Compressed Cache Layout Aware Prefetching Abstract: The speed gap between CPU and memory is impairing performance. Cache compression and hardware prefetching are two techniques that could…
Oustanding Paper Award
Congratulations to Benjamin Rouxel, Stefanos Skalistis, Steven Derrien and Isabelle Puaut who received an Outstanding paper award for their paper entitled “Hiding Communication Delays in Contention-Free Execution for SPM-based Multi-Core Architectures” at the Euromicro conference on real time systems 2019 (see paper).
SCHEMATIC at CGO’24
Nassim Amalou defends his PhD
Sara Hoseininasab at ARC 2023
Nicolas Bellec defends his PhD
On May 25th 2023, Nicolas Bellec defended his PhD on “Security enhancement in embedded hard real-time systems“.
Camille Le Bon at SILM-2021
Camille presented her paper “Damas: Control-Data Isolation at Runtime through Dynamic Binary Modification” in Sep 2021 at SILM. Watch the video online!
Nassim Amalou at RTCSA-2021
Nassim presented his paper “WE-HML: Hybrid WCET Estimation using Machine Learning for Architectures with Caches” in Aug 2021 at RTCSA. Watch the video online!
André Seznec receives the B. Ramakrishna Rau Award
André Seznec received the award “for pioneering contributions to cache design and branch prediction” on Oct 21st, during the (virtual) MICRO conference. The IEEE CS B. Ramakrishna Rau award was established in memory of B. Ramakrishna Rau, and awarded in recognition of his distinguished career in promoting and expanding the use of innovative computer microarchitecture techniques, including his innovation in compiler technology, his leadership in academic and industrial computer architecture, and his extremely high personal and ethical standards.
PhD defense of Niloofar Charmchi
Niloofar Charmchi successfully defended her PhD on Friday, July 10, 2020 at 10am. Jury members Rapporteurs : Karine HEYDEMANN Maîtresse de conférence, Sorbonne Université David DEFOUR Maître de conférence, Université de Perpignan Via Domitia Examinateurs : Florent DE DINECHIN Professeur des universités, INSA Lyon Steven DERRIEN Professeur des universités, Université Rennes 1 Directeur de thèse : André Seznec Directeur de recherches, Inria Co-dir. de thèse : Caroline Collange Chargée de recherche, Inria Title : Compressed Cache Layout Aware Prefetching Abstract: The speed gap between CPU and memory is impairing performance. Cache compression and hardware prefetching are two techniques that could…
Oustanding Paper Award
Congratulations to Benjamin Rouxel, Stefanos Skalistis, Steven Derrien and Isabelle Puaut who received an Outstanding paper award for their paper entitled “Hiding Communication Delays in Contention-Free Execution for SPM-based Multi-Core Architectures” at the Euromicro conference on real time systems 2019 (see paper).