Current Status :
Second Year PhD student working under Dr. Andre Seznec.
Working on managing shared caches in many-core processors.
Memory hierarchy : Cache architecture, Prefetching, Memory scheduling.
Masters : MSc in Computer Architecture, Networks and Systems, UPC, Barcelona, Spain.
Bachelors: B.Tech, Information Technology, Anna University, Chennai, India.
During Masters, I was also an intern at BSC, Spain (Aug, 2012 till Feb 2013) and INRIA, France (March 2013 till August 2013).
Postal address: INRIA, Campus de Beaulieu, 35042, Rennes, France,
Room No : E318
e-mail : firstname dot lastname at inria.fr