Arthur Perais

Short Summary

I am a Ph.D. student with the ALF research team under the supervision of André Seznec. My research focuses on core microarchitecture and in particular, how to increase sequential performance. To do so, I am currently revisiting a speculation technique that was introduced in the mid 90’s: Value Prediction.

Value prediction breaks true data dependencies between instructions and allows to uncover more ILP. Hence, performance is increased by issuing more instructions each cycle. Unfortunately, the research on Value Prediction techniques almost vanished in the early 2000’s as it was more effective to increase the number of cores than to dedicate silicon to Value Prediction. However high end processor chips currently feature 8-16 high-end cores and the technology will allow to implement 50-100 of such cores on a single die in a foreseeable future. Amdahl’s law suggests that the performance of most workloads will not scale to that level. Therefore, dedicating more silicon area to value prediction in high-end cores might be considered as worthwhile for future multicores.

Contact Information

INRIA Bretagne Atlantique
35042 Rennes Cedex, France
Office E303

Email: arthur.perais [at] inria.fr

More information

More complete web page.

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