Vagelis Bebelis

(a.k.a. Evangelos Bempelis)

I am an industrial PhD student in INRIA Grenoble in collaboration with STMicroelectronics. I am currently in my 3rd and final year of PhD under the supervision of Alain Girault and Pascal Fradet. I am working on data flow models and their scheduling on many-core platforms.

Before my PhD

2009-2010: Master in Emdedded Systems, University of Patras,Greece. Master thesis in IMEC, Belgium, topic: “Ultra-low power programmable processor architecture for 60 GHz digital front-end”

2003-2008: Bachelor in Electrical and Computer Engineering, University of Patras, Greece. Bachelor thesis topic: “Implementation of Cache Memory System”

Personal page (under construction)

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