Embedded control software is often specified as a set of periodic tasks together with a dependency graph describing their communications via shared variables. This talk will describe an ongoing collaboration with Airbus to express such systems in a specialized version of Lustre. This version of Lustre is “rate synchronous” in that components are synchronous relative to their respective rates, but not necessarily simultaneous relative to the base period. This point of view is reflected in the semantics and clock type systems. To compile such programs, we first transform them into Integer Linear Programming (ILP) problems whose resolution by a solver like glpk or cplex determines the phases of individual tasks. The tasks are then scheduled within each cycle to produce sequential code that respects the dataflow semantics of the source program. The overall schedule must respect constraints for load balancing, resource limiting, and end-to-end latency. We developed a novel ILP encoding to handle end-to-end latency constraints and validated it on an industrial application.
An article describing this work was presented at ECRTS 2023 [1]. There is an online demonstration of the ILP encoding for end-to-end latency [2].
[1] : https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.1
[2] : https://www.tbrk.org/dataflow/showlatency/
