Floating-point to fixed-point automatic conversion

Multimedia and signal processing are main application fields for reconfigurable platforms and these algorithms are mostly specified using floating-point operations. However, for power, cost and performance reasons, they are usually implemented with fixed-point operations either in software for DSP cores or as special-purpose hardware. Unfortunately, fixed-point conversion is very challenging and time-consuming, typically demanding 25 to 50% of the total design or implementation time. Thus, tools are required to automate this conversion. For software implementations, the aim is to define an optimized fixed-point specification which minimizes the code size and the execution time for a given computation accuracy constraint. This optimization is achieved through the modification of the scaling operation location and the selection of the data word-length according to the different data-types supported by the processors. For hardware implementations, the complete architecture has to be defined. The efficient implementation requires to minimize the architecture size and the power consumption. Thus, the conversion process goal is to minimize the operator word-length. In the fixed-point conversion process, one of the main challenge is to evaluate the fixed-point specification accuracy.

We investigate floating-point to fixed-point automatic conversion and have  defined an analytical approach for accuracy estimation of fixed-point embedded systems that provides precise estimates, much faster than using state-of-art simulations. A general method based on analytical models valid for all quantization laws and for all systems including arithmetic operations was proposed and is currently extended to decision (unsmooth) operators. We also defined an automatic floating-point to fixed-point conversion methodology which has recently been integrated into an open-source compilation and synthesis framework, and which will be used by companies such as STMicroelectronics. Compared to classical implementations based on a uniform word-length, our approach reduces the architecture area and energy consumption from 20% to 40%.

Proposed approaches and methods include:

• Analytical accuracy estimation provides faster analysis than simulation. After a static analysis of the software code (e.g. C), we extract a mathematical expression of the signal-to-quantization-noise ratio (SQNR) as a function of the data wordlength.
• Extension of the analytical accuracy models to any type of complex and hierarchical systems including smooth or unsmooth (decision) operators, linear or non-linear operators.
• Wordlength optimization of fixed point specification for hardware and software architectures. The aim is to optimize the fixed-point specification such as the cost, the execution time and/or the energy consumption are minimized subject to  fulfillment of the accuracy constraint.
• Definition of a floating-point to fixed-point automatic conversion flow for embedded systems closely linked to the compilation flow and the latest processor features (e.g. scaling, SWP/SIMD extensions).
• Development of an open-source tool: ID.Fix.

Please cite foremost references [2], [1] and [6] for our work.

Main references in this field

[1] D. Menard, D. Chillet, F. Charot, and O. Sentieys. Automatic Floating-point to Fixed-point Conversion for DSP Code Generation. In ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems 2002 (CASES 2002), pages 270-276, Grenoble, October 2002. pdf
[2] Daniel Menard and Olivier Sentieys. Automatic Evaluation of the Accuracy of Fixed-point Algorithms. In IEEE/ACM Design, Automation and Test in Europe (DATE-02), pages 529 – 535, Paris, March 2002. pdf
[3] D. Menard, R. Rocher, P. Scalart, and O. Sentieys. SQNR determination in non-linear and non-recursive fixed-point systems. In XII European Signal Processing Conference (EUSIPCO 2004), pages 1349-1352, Vienna, Austria, September 2004. pdf
[4] R. Rocher, D. Menard, N. Hervé, and O. Sentieys. Fixed-Point Configurable Hardware Components. EURASIP Journal on Embedded Systems (JES), 2006(1):Article ID 23197, 13 pages, 2006. pdf
[5] D. Menard, D. Chillet, and O. Sentieys. Floating-to-fixed-point Conversion for Digital Signal Processors. EURASIP Journal on Applied Signal Processing (JASP), Special Issue Design Methods for DSP Systems, 2006(1):1-15, 2006. pdf 
[6] D. Menard, R. Rocher, and O. Sentieys. Analytical Fixed-Point Accuracy Evaluation in Linear Time-Invariant Systems. IEEE Transactions on Circuits and Systems I: Regular Papers,, 55(10):3197-3208, November 2008. pdf
[7] D. Menard, R. Serizel, R. Rocher, and O. Sentieys. Accuracy Constraint Determination in Fixed-Point System Design. EURASIP Journal on Embedded Systems, 2008:12, 2008. pdf

Other references

[1] Daniel Menard and Olivier Sentieys. A methodology for evaluating the precision of fixed-point systems. In IEEE International Conference on Acoustic Speech, and Signal Processing ICASSP 2002, pages III-3152 – III-3155, Orlando, May 2002.
[2] D. Menard, P. Quemerais, and O. Sentieys. Influence of fixed-point DSP architecture on computation accuracy. In XI European Signal Processing Conference (EUSIPCO 2002) , Toulouse, September 2002.
[3] D. Menard and O. Sentieys. DSP Code Generation with Optimized Data-word Length Selection. In 8th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2004), volume 3199 of Lecture Notes in Computer Science (LNCS), pages 214-228, Amsterdam, Netherlands, September 2004. Springer-Verlag.
[4] R. Rocher, D. Menard, P. Scalart, and O. Sentieys. Accuracy evaluation of fixed-point LMS algorithm. In IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2004), pages 237-240, Montreal, Canada, May 2004.
[5] R. Rocher, D. Menard, O. Sentieys, and P. Scalart. Accuracy evaluation of fixed-point apa algorithms. In IEEE Int. Conference on Acoustics, Speech, and Signal Processing, ICASSP, volume 5, pages 57-60, Philadelphie, USA, 2005.
[6] R. Rocher, N. Herve, D. Menard, and O. Sentieys. Fixed-point Configurable Hardware Components for Adaptive Filters. In Proceedings of the IEEE International Symposium on Circuits and Systems, ISCAS’06, page 4. IEEE CAS Society, May 2006.
[7] N. Hervé, D. Ménard, and O. Sentieys. About the importance of operation grouping procedures for multiple word-length architecture optimizations. In P.C. Diniz, E. Marques, K. Bertels, M.M. Fernandes, and J.M.P. Cardoso, editors, Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC 2007), volume 4419 of Lecture Notes in Computer Science (LNCS), pages 191-200, Mangaratiba, Brazil, March 2007. Springer-Verlag.
[8] R. Rocher, D. Menard, O. Sentieys, and P. Scalart. Evaluation analytique de la précision des systèmes en virgule fixe. In Actes du GRETSI, pages 577-580, Troyes, France, Sep. 2007.
[9] R. Rocher, D. Menard, O. Sentieys, and P. Scalart. Analytical accuracy evaluation of fixed-point systems. In 15th European Signal Processing Conference (EUSIPCO), Poznan, Poland, September 2007.
[10] D. Menard, R. Serizel, R. Rocher, and O. Sentieys. Noise model for accuracy constraint determination in fixed-point systems. In Workshop on Design and Architectures for Signal and Image Processing (DASIP), Grenoble, France, November 2007.
[11] T. Hilaire, D. Menard, and O. Sentieys. Roundoff noise analysis of finite wordlength realizations with the implicit state-space framework. In 15th European Signal Processing Conference (EUSIPCO), Poznan, Pologne, September 2007.
[12] T. Hilaire, D. Menard, and O. Sentieys. Bit accurate roundoff noise analysis of fixed-point linear controllers. In IEEE International Conference on Computer-Aided Control Systems (CACSD’08), pages 607-612, September 2008.