Team presentation
An embedded architecture is an artifact of heterogeneous constituents and at the crossing of several design viewpoints: software, embedded in hardware, interfaced with the physical world. Time takes different forms when observed from each of these viewpoints: continuous or discrete, event-based or time-triggered. Unfortunately, modeling and programming formalisms that represent software, hardware and physics significantly alter this perception of time. Moreover, time reasoning in system design is usually isolated to a specific design problem: simulation, profiling, performance, scheduling, parallelization, simulation. The aim of project-team TEA is to define conceptually unifying frameworks for reasoning on the composition and integration of cyber-physical systems. Tea aims at putting such reasoning to practice by revisiting analysis, verification and synthesis issues in real-time system design with soundness and compositionality gained from formalization.
Research themes
Time in system design
• Logic and calculi to model time(s) and concurrency
• Abstractions and refinements to formally relate time domains
• Verification of timed quantitative properties
• Conformance checking and synthesis of adapters
• Logical and quantitative reasoning for analysis and verification
• Type inference, abstract interpretation, SAT/SMT verification, proof
• Control and scheduler synthesis, abstract affine scheduling
• Proof theory, type theory, module systems, contract algebra
Artifacts for system design
- ADFG: A versatile scheduler analysis and synthesis tool for SDF/CSDF implementing abstraction-refinement: ADFG
- Polychrony on Polarsys: an Eclipse IWG Polarsys project for polychronous modeling, analysis and code generation
- Tactics for the Keymaera X prover to automate the proof of contracts for the composition of hybrid system models
International and industrial relations
Projects and collaborations
- CSC Doctoral Scholarship with ECNU (2015-2018)
- Mitsubishi Electrics R&D doctoral grant (2019-2022)
- Inria-DGA Doctoral grant (2017-2020)
- Inria-MERCE (Mitsubishi R&D Europe) framework program (2018+)
- Inria-MSR Doctoral grant (2018-2021)
- Inria Project Lab “Future-proof IoT” (2019-2023)
- Mitsubishi Electrics R&D doctoral grant (2019-2022)
International collaborations
- Inria International Chair, Rajesh Gupta, UCSD (2017-2022)
- Insa-Inria International Chair, Shuvra Bhattacharya (2018-2022)
- Associate project COMPOSITE with UC San Diego, MESL (2017-2020)
- Associate project CONVEX with ISCAS, Beihang, Nanhang and Nankai Universisties (2018-2021)
National collaborations
• Inria projects PROSECCO, INFINE, CELTIQUE; IETR; ONERA
Former projects and collaborations
• Networks of excellence Artist, Artist 2, Artist Design (2000-2009)
• NSF-INRIA project BALBOA (2002-2009)
• DGE project TOPCASED (2005-2010)
• ANR project OPENEMBEDD (2006-2008, coordinator)
• IST project SPEEDS (2007)
• EADS Foundation grant (2006-2009)
• ANR project SPACIFY (2007-2010)
• ANR project FotoVP (2008-2010)
• Artemisia project CESAR (2009-2011)
• ITEA2 project OPEES (2010-2012)
• ANR project Verisync (2010-2014)
• INRIA associate project POLYCORE (2011-2013)
• Regional project VeriGALS (2011-2014)
• CORAC project CORAIL (2014-2017)
• FUI project P (2011-2015)
• Applied Science and Technology Research Institute (2015-2016)
• IIT Kanpur, India, INRIA International Partner
• The Embedded Systems Group at TU Kaiserslautern (2012-2015)
• The SAE committee for AADL (2012-2016)
• The Fermat Laboratory at Virginia Tech (2003-2015)
• ANR project FEEVER (2014-2017)
• Toyota Info-Technology Centre, Mountain View, CA (2014-2017)
• US Air Force Office for Scientific Research (2013-2017)
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